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Tokyo Institute 
    of Technology

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Tokyo Institute of Technology
Isshiki Lab

School of Engineering, 
Dept. of Information and Communication Engineering

Tokyo Institute of Technology
Isshiki Lab

School of Engineering, 
Dept. of Information and Communication Engineering

Tokyo Institute of Technology
Isshiki Lab

School of Engineering, 
Dept. of Information and Communication Engineering

Tokyo Institute of Technology
Isshiki Lab

School of Engineering, 
Dept. of Information and Communication Engineering

Tokyo Institute of Technology
Isshiki Lab

School of Engineering, 
Dept. of Information and Communication Engineering

About us

Develop platform where 
any Custom Processor is designed 
just using SW program (C/C++).

SW/HW cooperation for easier
designing, debugging, and expansion
with making use of SW flexibility.

HW~SW System designing of RISC-V
 processor, biometrics, 
DNN accelerator and so on.

In rapidly expanding AI, IoT, automation era, more and more customized SoC and speedy designing are required. However, designing custom processor needs professional skills and knowledgement and costs a lot.

Our laboratory focuses on researches on SoC design methodology, such as CAD tool called C2RTL which automatically generate RTL code just from C/C++ code that describes the behavior of custom processor you want such as RISC-V CPU core, NN accelerator, and so on. It also provides register-level debugging information graphically. We aim to develop comprehensive SoC designing platform where hardware (HW) is designed flexibly and readable like software (SW).  

Parallel with the C2RTL, we also do researches on application-oriented custom SoC architecture design, such as Deep learning Neural Networks accelerator, Multicore processors architectures, vector processing unit (VPU), information security and biometrics like speach and fingerprint recognition, etc, which are all dedicate to specific applications.

Improve
    System/SoC

Hardware / Software

   
enhance each other

About us

Develop platform where any
 Custom Processor is designed 
just using SW program (C/C++).

SW/HW cooperation for easier designing, debugging, and expansion with making use of SW flexibility.

HW~SW System designing of RISC-V processor, biometrics, DNN accelerator and so on.

In rapidly expanding AI, IoT, automation era, more and more customized SoC and speedy designing are required. However, designing custom processor needs professional skills and knowledgement and costs a lot.

Our laboratory focuses on researches on SoC design methodology, such as CAD tool called C2RTL which automatically generate RTL code just from C/C++ code that describes the behavior of custom processor you want such as RISC-V CPU core, NN accelerator, and so on. It also provides register-level debugging information graphically. We aim to develop comprehensive SoC designing platform where hardware (HW) is designed flexibly, verifiable and readable like software (SW).  

Parallel with the C2RTL, we also do researches on application-oriented custom SoC architecture design, such as Deep learning Neural Networks accelerator, Multicore processors architectures, vector processing unit (VPU), information security and biometrics like speach and fingerprint recognition, etc, which are all dedicate to specific applications.

Improve
    System/SoC

Hardware / Software

   
enhance each other

About us

Develop platform where any Custom Processor is designed just using SW program (C/C++).

SW/HW cooperation for easier designing, debugging, and expansion with making use of SW flexibility.

HW~SW System designing of RISC-V processor, biometrics, DNN accelerator and so on.

In rapidly expanding AI, IoT, automation era, more and more customized SoC and speedy designing are required. However, designing custom processor needs professional skills and knowledgement and costs a lot.

Our laboratory focuses on researches on SoC design methodology, such as CAD tool called C2RTL which automatically generate RTL code just from C/C++ code that describes the behavior of custom processor you want such as RISC-V CPU core, NN accelerator, and so on. It also provides register-level debugging information graphically. We aim to develop comprehensive SoC designing platform where hardware (HW) is designed flexibly, verifiable and readable like software (SW).  

Parallel with the C2RTL, we also do researches on application-oriented custom SoC architecture design, such as Deep learning Neural Networks accelerator, Multicore processors architectures, vector processing unit (VPU), information security and biometrics like speach and fingerprint recognition, etc, which are all dedicate to specific applications.

Improve
    System/SoC

Hardware / Software

   
enhance each other

About us

Develop platform where any Custom Processor is designed just using SW program (C/C++).

SW/HW cooperation for easier designing, debugging, and expansion with making use of SW flexibility.

HW~SW System designing of RISC-V processor, biometrics, DNN accelerator and so on.

In rapidly expanding AI, IoT, automation era, more and more customized SoC and speedy designing are required. However, designing custom processor needs professional skills and knowledgement and costs a lot.

Our laboratory focuses on researches on SoC design methodology, such as CAD tool called C2RTL which automatically generate RTL code just from C/C++ code that describes the behavior of custom processor you want such as RISC-V CPU core, NN accelerator, and so on. It also provides register-level debugging information graphically. We aim to develop comprehensive SoC designing platform where hardware (HW) is designed flexibly, verifiable and readable like software (SW).  

Parallel with the C2RTL, we also do researches on application-oriented custom SoC architecture design, such as Deep learning Neural Networks accelerator, Multicore processors architectures, vector processing unit (VPU), information security and biometrics like speach and fingerprint recognition, etc, which are all dedicate to specific applications.

Improve
    System/SoC

Hardware / Software

   
enhance each other

About us

Develop platform where any Custom Processor is designed just using SW program (C/C++).

SW/HW cooperation for easier designing, debugging, and expansion with making use of SW flexibility.

HW~SW System designing of RISC-V processor, biometrics, DNN accelerator and so on.

In rapidly expanding AI, IoT, automation era, more and more customized SoC and speedy designing are required. However, designing custom processor needs professional skills and knowledgement and costs a lot.

Our laboratory focuses on researches on SoC design methodology, such as CAD tool called C2RTL which automatically generate RTL code just from C/C++ code that describes the behavior of custom processor you want such as RISC-V CPU core, NN accelerator, and so on. It also provides register-level debugging information graphically. We aim to develop comprehensive SoC designing platform where hardware (HW) is designed flexibly, verifiable and readable like software (SW).  

Parallel with the C2RTL, we also do researches on application-oriented custom SoC architecture design, such as Deep learning Neural Networks accelerator, Multicore processors architectures, vector processing unit (VPU), information security and biometrics like speach and fingerprint recognition, etc, which are all dedicate to specific applications.

Improve
    System/SoC

Hardware / Software

   
enhance each other